1. Field of the Invention
This invention relates to light emitting diodes (LEDs) and, more particularly, to LED chip devices with improved light extraction characteristics.
2. Description of the Related Art
Light emitting diodes (LEDs) are solid state devices that convert electric energy to light and generally comprise an active region of semiconductor material, such as a quantum well, sandwiched between two oppositely doped layers of semiconductor material. When a bias is applied across the doped layers, holes and electrons are injected into the active region where they recombine to generate light. Light is emitted from the active layer and from all surfaces of the LED. Recent advances in LEDs (such as nitride based LEDs) have resulted in highly efficient light sources that surpass the efficiency of filament based light sources while providing a light with equal or greater brightness in relation to input power. This new generation of LEDs is useful in applications requiring a higher intensity light output such as high-power flash lights, airplane lighting systems, fiber-optic communication systems, and optical data storage systems.
Solid state lighting (SSL) packages have been developed having a plurality of LED chips mounted to a package, circuit board, or a heat sink. When a bias is applied to each of the LEDs the SSL package emits the combined light from the LED chips. Some standard LED chips can be fabricated on either thermally or electrically conductive substrates. Electrically conductive substrates typically result in an LED with an active backside mounting pad (metal) and this arrangement is particularly applicable to vertical geometry LED chips. In these embodiments, a bias can be applied to the LEDs through the active backside metal, and through an LED chip contact. In some SSL packages it is desirable to individually control the emission of the LED chips in the package. Individual control using vertical geometry LED chips with active backside mounting pads can require complicated package, circuit board and heat sink design.
Some SSL packages utilize LED chips having high light output characteristics, which results in elevated LED chip operating temperatures. In these SSL packages the LED chips should have low thermal resistance from the heat generating junction of the LED to the SSL package, circuit board and heat sink that allow heat from the LED to conduct away from the LED where it can dissipate. To allow for individual control of the LEDs, it may be desirable for the LED chips to have a mounting option that allows for thermal bonding to the circuit board with a solderable electrically neutral thermal pad that is not used for applying a bias to the LED chip.
Flip-chip LEDs minimize thermal resistance to the package, circuit board and heat sink, but create an electrically active thermal pad below the chip. In other SSL packages, an electrically neutral thermal pad can be created by incorporating a dielectric into the SSL package (e.g. alumina substrates). This, however, substantially increases the packages thermal resistance reducing the LED chip's ability to conduct heat away from the LEDs. Electrically neutral pads can also be created with LEDs grown on electrically insulating substrates, such as sapphire. These types of substrates, however, typically suffer from poor thermal conductivity.
FIG. 1 illustrates a known LED package 100. The top layer of semiconductor material constitutes the primary emission surface 102. The bias is applied to the vertical geometry device via contacts disposed on opposite sides of the device. Bond pads 104 provide a connection for one of the leads, for example a wire bond, on the primary emission surface 102. The other lead is connected to the device on the back side of the package (not shown). The current flows as a result of the voltage differential, and recombination in the active region generates light. A passivation layer 106 covers the sidewalls of the device 100 and an edge portion of the primary emission surface 102. Current spreading conductors 108 help to distribute the current evenly across the entire area of the primary emission surface 102 to make full use of the entire active region beneath.
FIG. 2 shows a cross-sectional view of a portion of device 100 along section line A-A′. A bias is applied across the device as indicated by the positive (+) and negative (−) signs. One of the leads is attached at the bond pad 104; the other lead is attached on the backside of a conductive mount 202. Due to the limited conductivity of the semiconductor material, current Ic tends to crowd near the bond pad 104 where the bias is applied as shown by the current arrows. The high current density around the bond pads 104 causes more light to be generated in portions of the active region 204 near the bond pads 104. Some of the light generated in this area gets trapped underneath the bond pads 104 and ultimately absorbed (as shown by l1), decreasing the light output of the device. Light generated in areas of the active region 202 farther from the bond pad 104 has a much higher probability of escaping the package through the primary emission surface 102 (as shown by l2). Thus, one challenge associated with designing LED packages is extraction efficiency. An efficient design provides all the elements necessary for operation while allowing the maximum amount of light generated in the active region to be emitted.